AppsGuidesAI DictionarySmall FixesOn RecordAboutFollow the lab

Wafer-scale chip

Also called wafer scale engine

A wafer-scale chip uses nearly a whole silicon wafer, the disc that chips are normally cut from, as one giant processor instead of many small ones.

Chips and scaleTechnical

In plain words

Chips are made on round discs of silicon called wafers. Normally the factory prints many chips on each wafer and cuts them apart. A big AI chip such as a GPU is one of those pieces, and its size is capped: the machines that print chips can only expose about 850 square millimetres at a time.

A wafer-scale chip skips the cutting. Most of the wafer becomes one processor, more than 50 times the area of a large GPU. Cerebras, a US company, makes the best-known one: its WSE-3 has 4 trillion transistors and 900,000 cores.

Why bother? When a model is spread over many separate chips, they spend much of their time passing data over cables. On one wafer, data travels short distances over silicon, which is faster and uses less energy. The catch: such a huge piece of silicon is hard to make, power and cool.

Everyday example

A sheet of stamps you never tear

A post office prints stamps in big sheets, then tears them apart. Imagine keeping the whole sheet as one giant stamp, with printed lines joining every square to its neighbours. If a few squares are smudged, you route around them and the sheet still works. A wafer-scale chip is that sheet: hundreds of thousands of small cores on one piece of silicon, each wired to its neighbours.

Where the example breaks: A spoiled sheet of stamps is cheap to throw away. A wafer-scale chip is one costly part, so it needs spare cores and flexible wiring to survive the tiny defects every wafer has.

Go deeper

How it actually works

Wafer-scale designs attack one bottleneck: the time and energy spent moving data between separate chips.

  1. Defects were the old problem

    Every wafer has a few flaws. With small chips, you throw away the bad ones. With one giant chip, a single flaw could ruin everything, which is why Gene Amdahl's 1980s company Trilogy Systems gave up on the idea. Modern designs add spare cores and route around defects.

  2. Memory right beside the cores

    The WSE-3 spreads 44 GB of fast on-chip memory (SRAM) among its cores, so data sits next to the maths. GPUs keep most of their data in separate HBM stacks beside the chip. On-wafer memory is faster but smaller, so very large models must be split across several wafers.

  3. Power and heat

    Feeding power into one huge piece of silicon, and getting the heat back out, is hard. Researchers name power delivery as one of the biggest challenges for very large wafer-scale systems.

  4. Another route to giant chips

    TSMC, the chip factory, offers a middle path: place pretested ordinary chips side by side on a wafer and wire them densely, so they act almost like one chip. Tesla's Dojo supercomputer used this. Tesla halted Dojo in August 2025, then said in January 2026 it would restart work on a new version. TSMC planned a more advanced version for 2027.

First modern one
Cerebras WSE, August 2019: 1.2 trillion transistors, 400,000 cores, 46,225 mm²
Third generation
Cerebras WSE-3, March 2024: 4 trillion transistors, 900,000 cores, 44 GB of on-chip memory, made by TSMC at 5 nm
Size limit for a normal chip
About 850 mm², set by the machines that print chips; a wafer-scale chip is about 21.5 cm on each side
As of November 2026
Cerebras announced CS-4 systems with three WSE-3 Turbo wafers in August 2026, with first shipments that quarter. The company listed on Nasdaq in May 2026

Questions people ask

What is a wafer in chipmaking?

A thin, round disc of very pure silicon. Chips are printed on it layer by layer, then the wafer is cut into individual chips. A wafer-scale chip keeps most of the wafer in one piece.

Who makes wafer-scale chips?

Cerebras is the best-known maker, with its Wafer-Scale Engine series. TSMC offers a related method that joins many smaller chips on one wafer, which Tesla used for its Dojo supercomputer.

Why aren't all AI chips wafer-scale?

They are hard to manufacture, power and cool, and their on-chip memory is limited, so the biggest models still need many of them. Most of the industry has instead linked many smaller chips with fast connections.

How big is a wafer-scale chip?

The Cerebras chips are about 21.5 cm on each side, an area of 46,225 square millimetres. The machines that print ordinary chips cap a single chip at roughly 850 square millimetres.

Was this clear?

1 is confusing, 5 is crystal clear. One tap, no account needed.

Spotted something wrong, or know a better example? Suggest a change

Further reading